New low-cost option for high-speed 4K video display interfacing from GOWIN

GOWIN Semiconductor has launched the GW5AT-15 FPGA to provide a programmable high-speed bridging solution for demanding consumer electronics and automotive use cases such as 4K video transfer at high frame rates up to 120 frames/s.
The new GW5AT-15, the latest member of the Arora-V FPGA family, combines various hard-core SerDes transceivers with high-speed memory and 15,120 logic elements. The product is available in package options including a compact 4.9mm x 5.3mm WLCSP, which offers maximum SerDes throughput of 12.5Gbps.
The features of the GW5AT-15 are ideal for an emerging set of use cases which call for very high bandwidth for video and other data-transfer applications, and which require a small board footprint – examples include consumer tablets, augmented/virtual reality headsets, and car infotainment systems.
The high SerDes bandwidth offered by the GW5AT-15 makes it ideal for use in high-speed interfaces. This new FPGA features:
• 3-lane MIPI C-PHY operating at up to 5.75Gbps/lane
• 4-lane PCIe 3.0
• 4-lane MIPI D-PHY operating at up to 2.5Gbps/lane
The GW5AT-15 also supports high-speed USB Type-C and other USB connections with its on-chip USB 3.x and USB 2.x PHYs.
The high throughput offered by the GW5AT-15 supports gamers’ requirement for high frame-rate 4K video in the latest consumer tablet designs. In vehicle infotainment systems, the GW5AT-15’s provision of high-speed USB and other interfaces enables cars to better emulate the smartphone user experience through applications such as the Android Auto or Apple CarPlay software companions.
All SerDes operations are backed by co-packaged fast memory resources including:
• 118kb of shadow SRAM
• 630kb of block SRAM (BSRAM) arranged as 35 x 18kb
• Optional 64Mb (in MG132P package) or 128Mb (in CM90P package) of pseudo SRAM (pSRAM)
• Optional 8Mb of NOR Flash
The FPGA also features two on-chip PLLs, multiple clock sources, a JPEG codec, and an ADC.
Like the other members of the Arora-V family, the GW5AT-15 is built on a low-power 22nm TSMC process. It is backed by the GOWIN EDA FPGA design environment, which includes an FPGA design tool, IP cores and reference designs. The FPGA design tool supports the SystemVerilog, Verilog and VHDL programming languages.

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