Low power memory IP by sureCore helps fast-track power critical designs
Low power memory IP by sureCore is available off-the-shelf and for use at the most popular industry nodes.
Explaining the introduction, Paul Wells, sureCore’s CEO said that while customers want a level of customisation to precisely fit a project’s needs, it has found that certain memory configurations keep being requested because similar projects will have the same memory requirements. “We have therefore productised these to become off-the-shelf IP that are immediately available to just be dropped into designs such as wearables, hearables, edge-AI and IoT where ultra-low power consumption is vital for competitive differentiation and hence to the success of the end product,” said Wells.
Wearables and hearables typically require a long battery life and an always-on listening mode. sureCore’s EverOn single port SRAM that has a wide operating voltage range from 0.6V to process nominal voltage. It has been adopted by both smart watch and true wireless stereo (TWS) earbud developers. Standard memory designs can only work down to process-nominal voltage but EverOn’s banking structure allows architects to implement fine-grained, even lower voltage, sleep modes for up to 50 per cent power savings compared to standard memory cells. The voltage of the chip can be dynamically adjusted up and down in tandem with the performance requirements for the operation in hand to save power as required. For example, this could be going from a high performance to a low performance mode or even a monitoring state awaiting a wake-up event. Front end views are available in sureCore’s web-based compiler to help facilitate customer evaluation. Versions for 40ULP, 28HPC+, 22ULL are available with memory instances up to 0.5Mbyte supported.
Applications such as edge AI, machine learning and hearing aids that need to maximise battery life by minimising both operating and stand-by power consumption are served by sureCore’s PowerMiser low dynamic power, single port SRAM that delivers up to 50 per cent dynamic power savings compared to market leaders, said sureCore. In addition, there is an average 20 per cent saving on leakage power. The patented Bit Line Voltage Control techniques virtually eliminate performance compromises even with a much reduced power envelope. Retentive sleep modes, including light sleep for rapid wake-up as well as deep-sleep for maximal leakage current savings, are available. Various periphery Vt options are possible in order to optimise for either leakage or speed as demanded by application need. Front end views are available in sureCore’s web-based compiler to help facilitate customer evaluation. Versions for 28HPC+, 22ULL, 16FFC and 28FDSOI are available with memory instances up to 0.5MB supported.