Two axis motion during a single actuation of the test socket is provided by the Kepler contact technology. It has been developed by Smiths Interconnect, and is claimed to the only contact technology for IC testing to provide this will boosts first pass yield. It is also claimed to enhance production reliability and extend maintenance intervals.
The technology can be used for testing high performance computing, wearables or automotive chips, confirmed Smiths Interconnect.
Presently, the semiconductor test industry uses the traditional vertical spring probes for BGA, LGA, QFN, and QFP packaging testing, or cantilever scrubbing contact design has been used in peripheral segments to remove surface oxides and contaminants. Both technologies, however, require maintenance and performance monitoring to ensure optimal results during testing cycles.
Wearable
MRigidCSP package is claimed to increase MOSFET’s mechanical strength
Robust package technology, MRigidCSP, by Alpha and Omega Semiconductor (AOS), is initially offered on its AOCR33105E, 12V, common drain, dual N-channel MOSFET. The packaging technology is designed to decrease on resistance while increasing mechanical strength, and is particularly suited to battery applications in smartphones, tablets and ultra-thin notebooks.
AOS explained that fast charging, which requires lower power loss in the battery management circuit, is now widely adopted for portable devices. As the charging currents increase, ultra-low electrical resistance is needed for improved performance. In standard wafer-level chip scale packages (WL-CSPs), the substrate can be a significant portion of the total resistance when back-to-back MOSFETs are employed in battery management applications. A thinner substrate reduces the overall resistance but drastically reduces the package’s mechanical strength. This reduction of mechanical strength can lead to more stress during the PCB assembly reflow process, potentially causing warping or cracking in the die and, ultimately, failure in the application. The AOCR33105E is designed with trench-power MOSFET technology in a common drain configuration for design simplicity. It features low on resistance with ESD protection to improve performance and safety in battery management, such as protection switches and mobile battery charging and discharging circuits.
“Incorporating the AOS MRigidCSP packaging technology with our new dual N-channel MOSFET combines electrical performance improvements with the benefit of high robustness,” said Peter H. Wilson, senior MOSFET product line marketing director at AOS.
AOS designed the MRigidCSP package technology to be used with high aspect ratio CSP die sizes. The CSP construction delivers “a significantly strengthened battery MOSFET that won’t warp or break during the board manufacturing process,” added Wilson.
The AOCR33105E is available in a 2.08 x 1.45mm package, with RDS(on) of 3mOhm at 4.5V / 4.2mOhm at 3.1V.
The AOCR33105E in the MRigidCSP package is immediately available in production quantities with a lead time of 14 to 16 weeks. It is RoHS 2.0 compliant and is halogen-free.
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