PSoC architecture has ARM Cortex-M0 core for interface options
Embedded designs can be delivered to market quicker, and with the ability to develop user interfaces, using the PSoC 4 programmable SoC, says Cypress Semiconductor.
The chip has a 32bit ARM-Cortex-M0 core, adding up to 256kbyte flash memory, 98 general purpose I/Os, 33 programmable analogue and digital blocks, a USB device controller, and a CAN interface. The PSoC 4 L-Series delivers up to 13 programmable analogue blocks including four high-performance op amps, four current-output DACs, two low-power comparators, a 12bit SAR ADC and dual CapSense blocks with up to 94 capacitive-sensing channels. The analogue blocks enable engineers to create on-chip, custom analogue front ends to support new end-product features, without increasing product costs, size or power consumption, says the company.
Up to 20 programmable digital blocks include eight timer/counter/PWM blocks, four serial communication blocks and eight universal digital blocks (UDBs), each of which contain two PLDs, a programmable data path and status and control registers. UDBs can be configured as coprocessors to offload compute-intensive tasks from the ARM Cortex-M0 core. The blocks also enable engineers to implement custom digital peripherals, state machines or glue logic. Traditional MCUs typically require additional ICs to implement this functionality.
The scalable PSoC 4 architecture is complemented by the PSoC Creator integrated design environment (IDE) for system design and to accelerate time-to-market by enabling concurrent hardware and firmware design.
The SoC is sampling now, with production expected in the first quarter of 2016. Parts will be available in 48pin TQFP, 64pin TQFP, 68pin QFN and 124pin VFBGA packages.
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